Deep trench capacitors embedded in package substrate
US11784215B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2020 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Mar 2, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19106
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This disclosure relates to deep trench capacitors embedded in a package substrate on which an integrated circuit is mounted. In some aspects, a chip package includes an integrated circuit die that has a power distribution circuit for one or more circuits of the integrated circuit. The chip package also includes a substrate different from the integrated circuit and having a first surface on which the integrated circuit die is mounted and a second surface opposite the first surface. The substrate includes one or more cavities formed in at least one of the first surface or the second surface. The chip package also includes one or more deep trench capacitors disposed in at least one of the one or more cavities. Each deep trench capacitor is connected to the power distribution circuit by conductors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.