Patent · US Active

Techniques for wafer level die testing using sacrificial structures

US11788929B1 · kind B1 · utility

0Cited by
18References
15Claims
0Family size

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Key dates

Filing dateSep 29, 2022
Grant dateOct 17, 2023
Priority date
Expiry dateSep 29, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG02B6/30
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method of testing a photonics die at the wafer level includes providing a sacrificial waveguide and a grating coupler at least partially in a scribe line between dies of a wafer, performing one or more tests on the dies of the wafer via the sacrificial waveguide and grating coupler in the scribe line, and removing the sacrificial waveguide during separation of the dies of the wafer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.