SiC epitaxial wafer and method of manufacturing SiC epitaxial wafer
US11795577B2 · kind B2 · utility
1Cited by
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7Claims
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Key dates
| Filing date | Aug 2, 2022 |
| Grant date | Oct 24, 2023 |
| Priority date | — |
| Expiry date | Aug 2, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/834
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A SiC epitaxial wafer includes a SiC substrate and an epitaxial layer laminated on the SiC substrate, wherein the epitaxial layer contains an impurity element which determines the conductivity type of the epitaxial layer and boron which has a conductivity type different from the conductivity type of the impurity element, and the concentration of boron is less than 1.0×1014 cm−3 at any position in the plane of the epitaxial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.