Integrated circuit

US11800812B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Tai-Yen Peng · Hsinchu, TW
• Chien-Chung Huang · Tainan, TW
• Yu-Shu Chen
• Sin-Yi Yang · Taichung, TW
• Chen-Jung Wang · Hsinchu, TW
• Han-Ting Lin · Hsinchu, TW
• Chih-Yuan Ting · Taipei, TW
• Jyu-Horng Shieh · Hsinchu, TW
• Hui-Hsien Wei · Taoyuan, TW

Key dates

• Filing date: Mar 7, 2022
• Grant date: Oct 24, 2023
• Expiry date: Mar 7, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/80

Abstract

An integrated circuit includes a dielectric layer, a memory device, and a resistor. The memory device includes a bottom electrode via, a bottom electrode, a resistance switching element, and a top electrode. The bottom electrode via is in the dielectric layer. The dielectric layer has a first portion extending along sidewalls of the bottom electrode via, a second portion extending laterally from the first portion, and a third portion. The bottom electrode is over the bottom electrode via. The resistance switching element is over the bottom electrode. The top electrode is over the resistance switching element. The resistor is over the third portion of the dielectric layer. A thickness of the third portion of the dielectric layer is greater than a thickness of the second portion of the dielectric layer.