Semiconductor package including heat dissipation structure
US11804444B2 · kind B2 · utility
0Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2020 |
| Grant date | Oct 31, 2023 |
| Priority date | — |
| Expiry date | Mar 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes; a semiconductor chip including a top surface and an opposing bottom surface, a heat dissipation structure including a lower adhesive layer adhered to the top surface of the semiconductor chip, a heat dissipation layer disposed on the lower adhesive layer, and a conductive layer disposed on the heat dissipation layer, a core layer including a cavity and a lower surface, wherein a combination of the semiconductor chip and the heat dissipation structure is disposed within the cavity, and a bottom re-wiring layer including a bottom re-wiring line connected to the semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.