Optical and electrical secondary path rejection

US11804499B2 · kind B2 · utility

Assignee

• Quantum-Si Incorporated · US

Inventors

• Dajiang Yang · San Jose, US
• Farshid Ghasemi · Guilford, US
• Keith G. Fife · Palo Alto, US
• Todd Rearick · Cheshire, US
• Ali Kabiri · Guilford, US
• Gerard Schmid · Guilford, US
• Eric A. G. Webster · Mountain View, US

Key dates

• Filing date: Jun 26, 2020
• Grant date: Oct 31, 2023
• Expiry date: Dec 20, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04N25/771
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Described herein are techniques to reduce or remove the impact of secondary path photons and/or charge carriers on storage bins of an integrated device to improve noise performance, and thus, sample analysis. Some embodiments relate to optical rejection techniques such as including an optical barrier positioned to block at least some photons from reaching the storage bins. Some embodiments relate to electrical rejection techniques such as including an electrical barrier configured to block at least some charge carriers from reaching the storage bins along at least one secondary path. Some embodiments relate to an integrated device in which at least one storage bin is shaped and/or positioned relative to the photodetector to facilitate receipt of some charge carriers (e.g., fluorescent emission charge carriers) and/or photons and to impede receipt of other charge carriers (e.g., noise charge carriers) and/or photons.