Memory sub-system sanitization
US11810621B2 · kind B2 · utility
1Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2021 |
| Grant date | Nov 7, 2023 |
| Priority date | — |
| Expiry date | Feb 19, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes receiving signaling indicative of performance of a sanitization operation to a processing device coupled to a memory device and applying a sanitization voltage to a plurality of memory blocks of the memory device. The sanitization voltage can be greater than an erase voltage of the plurality of memory blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.