Wafer-level 3D integration of high voltage optical transformer

US11810908B2 · kind B2 · utility

Assignee

• Meta Platforms Technologies, LLC · US

Inventors

• Christopher Yuan Ting Liao · Seattle, US
• Maik Andre Scheller · Redmond, US
• Jonathan R. Peterson · Woodinville, US
• Ehsan Vadiee · Redmond, US
• John Michael Goward · Ayr, GB
• Anurag Tyagi · Kirkland, US
• Andrew John Ouderkirk · Kirkland, US

Key dates

• Filing date: May 21, 2021
• Grant date: Nov 7, 2023
• Expiry date: Jan 4, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F77/955
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method of forming a high voltage optical transformer includes forming a via through a transparent carrier wafer, forming a conductive layer within the via, bonding a solid state lighting (SSL) package to a first side of the carrier wafer, and bonding a photovoltaic (PV) wafer to a second side of the carrier wafer opposite to the first side. The photovoltaic wafer may include an active area and a conductive area located outside of the active area that is in electrical contact with the conductive layer. The method further includes forming both an SSL contact with the solid state lighting package and a PV contact with the conductive layer on the same side of the carrier wafer.