Zone block staging component for a memory subsystem with zoned namespace
US11816345B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2021 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Mar 29, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory sub-system can determine a block granularity for an input/output (I/O) data stream received from a host system. The memory sub-system can determine that the block granularity is different than a memory block granularity of a first memory region in a first namespace of the one or more memory devices, where the first memory region is to store the I/O data stream. The memory sub-system can accumulate blocks from the I/O data stream in a second memory region in a second namespace of the one or more memory devices. Responsive to a capacity of the accumulated blocks in the second memory region satisfying a threshold criterion, the memory sub-system can migrate the accumulated plurality of blocks from the second memory region to the first memory region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.