Post passivation interconnect
US11817404B2 · kind B2 · utility
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20Claims
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Assignee
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Key dates
| Filing date | Aug 5, 2021 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Nov 20, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) device includes a redistribution line over a substrate, wherein an entire sidewall of the redistribution line is curved. The IC device further includes a passivation layer over the redistribution line, wherein a distance from a bottommost surface of the passivation layer to the substrate is less than a distance from a bottommost surface of the redistribution line to the substrate. The IC device further includes a polymer layer over the passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.