Semiconductor die employing repurposed seed layer for forming additional signal paths to back end-of-line (BEOL) structure, and related integrated circuit (IC) packages and fabrication methods
US11817406B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2021 |
| Grant date | Nov 14, 2023 |
| Priority date | — |
| Expiry date | Jan 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/381
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die (“die”) employing repurposed seed layer for forming additional signal paths to a back end-of-line (BEOL) structure of the die, and related integrated circuit (IC) packages and fabrication methods. A seed layer is repurposed that was disposed adjacent the BEOL interconnect structure to couple an under bump metallization (UBM) interconnect without a coupled interconnect bump thus forming an unraised interconnect bump, to a UBM interconnect that has a raised interconnect bump. To couple the unraised interconnect bump to the raised interconnect bump, the seed layer is selectively removed during fabrication to leave a portion of the seed layer repurposed that couples the UBM interconnect that does not have an interconnect bump to the UBM interconnect that has a raised interconnect bump. Additional routing paths can be provided between raised interconnect bumps to the BEOL interconnect structure through coupling of UBM interconnects to an unraised interconnect bump.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.