Receiver for removing intersymbol interference
US11824702B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 13, 2022 |
| Grant date | Nov 21, 2023 |
| Priority date | — |
| Expiry date | Apr 13, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0334
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver includes a sampling circuit configured to sample a comparison result between an input signal and a plurality of threshold voltages according to a sampling clock signal; a clock controller configured to generate the sampling clock signal according to a clock control signal; and a control circuit configure to generate the clock control signal and the plurality of threshold voltages according to a target value and an output of the sampling circuit. The control circuit operates to control a ratio of a magnitude of a main cursor of the input signal and a magnitude of a pre-cursor intersymbol interference to be the target value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.