Semiconductor inspection tool system and method for wafer edge inspection
US11828713B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2022 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Dec 13, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor inspection tool system is disclosed. The system comprises a first illumination setup for generating at least one first illumination radiation and for directing the at least one first illumination radiation to at least one bonding region non-filled volume formed between two layers of a multi-layer stack. The system also comprises a second illumination setup being for generating at least one second illumination radiation and for directing the at least one second illumination radiation at multi-layer stack edges. The second illumination radiation is configured for illuminating at least a normal edge of at least two layers, the second illumination setup has different radiation parameters than the first illumination setup. The system further includes a bonding region sensor unit for collecting reflected electromagnetic radiation from a bonding region volume and generating at least one sensing data being indicative of the bonding region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.