Guided power grid augmentation system and method
US11829698B2 · kind B2 · utility
0Cited by
15References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2021 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Jan 29, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for guided power grid augmentation determines a minimum resistance path for cells within an integrated circuit (IC) design. The minimum resistance path traces a conducting wire connecting a pin of a cell to an IC tap within the IC design. A voltage drop value for each of the cells is determined so as to identify target cells having a voltage drop value that satisfies a voltage drop criteria. Polygons have defined size characteristics are defined around the minimum resistance paths of the target cells, and conductors, such as additional conductors, are generated within the defined polygons.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.