Semiconductor package and method for manufacturing the same
US11830786B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2020 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Feb 11, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15313
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip-chip semiconductor package with improved heat dissipation capability and low package profile is provided. The package comprises a heat sink having a plurality of heat dissipation fins and a plurality of heat dissipation leads. The heat dissipation leads are connected to a plurality of thermally conductive vias of a substrate so as to provide thermal conductivity path from the heatsink to the substrate as well as support the heatsink to relieve compressive stress applied to a semiconductor die by the heatsink. The package further comprises an encapsulation layer configured to cover the heat dissipation leads of the heat sink and expose the heat dissipation fins of the heat sink.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.