RF SiC MOSFET with recessed gate dielectric
US11830943B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2021 |
| Grant date | Nov 28, 2023 |
| Priority date | — |
| Expiry date | Feb 7, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A Field Effect Transistor (FET) may include a semiconductor substrate having a first conductivity type, a semiconductor layer of the first conductivity type formed over the substrate, and a pair of doped bodies of a second conductivity type opposite the first conductivity type formed in the semiconductor layer. A trench filled with a trench dielectric is formed within a region between the doped bodies. The FET may be a Vertical Metal-Oxide-Semiconductor FET (VMOSFET) including a gate dielectric disposed over the region between the doped bodies and the trench, and a gate electrode disposed over the gate dielectric, wherein the trench operates to prevent breakdown of the gate dielectric, or the FET may be a Junction FET. The FET may be designed to operate at radio frequencies or under heavy-ion bombardment. The semiconductor substrate and the semiconductor layer may comprise a wide band-gap semiconductor such as silicon carbide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.