Semiconductor package with built-in vibration isolation, thermal stability, and connector decoupling
US11834328B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2021 |
| Grant date | Dec 5, 2023 |
| Priority date | — |
| Expiry date | Oct 8, 2041 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/032
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor package with design features, including an isolation structure for internal components and a flexible electrical connection, that minimizes errors due to environmental temperature, shock, and vibration effects. The semiconductor package may include a base having a first portion surrounded by a second portion. A connector assembly may be attached to the first portion. The connector assembly may extend through an opening in the base. A lid attached may be attached to, at least, the second portion. The attached lid may form a hermetically-sealed cavity defined by an upper surface of the first portion, the connector assembly, and an inner surface of the lid. An elastomer pad may be on the first portion and a sub-assembly may be on the elastomer pad. A flexible electrical connection may be formed between the connector assembly and the sub-assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.