Encapsulation stack for improved humidity performance and related fabrication methods
US11842937B2 · kind B2 · utility
1Cited by
37References
25Claims
0Family size
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Key dates
| Filing date | Jul 30, 2021 |
| Grant date | Dec 12, 2023 |
| Priority date | — |
| Expiry date | Apr 26, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor device includes a substrate, a semiconductor structure on the substrate, a metallization layer comprising a non-planar surface on a surface of the semiconductor structure, a non-planar encapsulation layer on the non-planar surface of the metallization layer, the non-planar encapsulation layer comprising a non-planar encapsulant surface that is opposite the non-planar surface, and a self-planarizing encapsulation layer on the non-planar encapsulation layer and comprising a planarized surface that is opposite the non-planar encapsulant surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.