Direct swap caching with zero line optimizations
US11847459B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2022 |
| Grant date | Dec 19, 2023 |
| Priority date | — |
| Expiry date | Jun 16, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods related to direct swap caching with zero line optimizations are described. A method for managing a system having a near memory and a far memory comprises receiving a request from a requestor to read a block of data that is either stored in the near memory or the far memory. The method includes analyzing a metadata portion associated with the block of data, the metadata portion comprising: both (1) information concerning whether the near memory contains the block of data or whether the far memory contains the block of data and (2) information concerning whether a data portion associated with the block of data is all zeros. The method further includes instead of retrieving the data portion from the far memory, synthesizing the data portion corresponding to the block of data to generate a synthesized data portion and transmitting the synthesized data portion to the requestor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.