Microelectronic packages having a die stack and a device within the footprint of the die stack
US11848311B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 25, 2022 |
| Grant date | Dec 19, 2023 |
| Priority date | — |
| Expiry date | Feb 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06575
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate and at least one microelectronic device, which is separate from the microelectronic die stack, attached to the microelectronic substrate within the footprint of one of the microelectronic dice within the microelectronic die stack. In one embodiment, the microelectronic die stack may have a plurality of stacked microelectronic dice, wherein one microelectronic die of the plurality of microelectronic dice has a footprint greater than the other microelectronic die of the plurality of microelectronic dice, and wherein the at least one microelectronic device is attached to the one microelectronic die of the plurality of microelectronic dice having the greater footprint.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.