Circuit board for semiconductor test
US11852679B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2022 |
| Grant date | Dec 26, 2023 |
| Priority date | — |
| Expiry date | Apr 14, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2601
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit board for semiconductor test includes first and second sub-circuit boards, and an insulating dielectric layer therebetween. Each sub-circuit board includes a substrate and circuits including upper and lower contacts. The insulating dielectric layer includes through holes, and connecting conductors disposed therein and electrically connected with the upper and lower contacts of two sub-circuit boards. The circuit board is defined with central and peripheral regions. The lower contacts of the first sub-circuit board in the central region are electrically connected with a probe head. The upper contacts of the second sub-circuit board in the peripheral region are electrically connected with a tester, larger in pitch than the lower contacts of the first sub-circuit board in the central region, and larger in amount than the lower contacts of the first sub-circuit board in the peripheral region. The circuit board has great power test uniformity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.