Aggressive quick-pass multiphase programming for voltage distribution state separation in non-volatile memory
US11854611B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2021 |
| Grant date | Dec 26, 2023 |
| Priority date | — |
| Expiry date | Nov 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiphase programming scheme for programming a plurality of memory cells of a data storage system includes a first programming phase in which a first set of voltage distributions of the plurality of memory cells is programmed by applying a first plurality of program pulses to word lines of the plurality of memory cells, and a second programming phase in which a second set of voltage distributions is programmed by applying a second plurality of program pulses to the word lines of the plurality of memory cells. The second programming phase includes maintaining a margin of separation between two adjacent voltage distributions of the second set of voltage distributions after each of the second plurality of program pulses. This scheme achieves better margin using an aggressive quick pass approach, which helps with data recovery in case of power loss events.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.