Electrical fuse one time programmable (OTP) memory
US11854622B2 · kind B2 · utility
1Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2021 |
| Grant date | Dec 26, 2023 |
| Priority date | — |
| Expiry date | Apr 30, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An eFuse cell is provided. The eFuse cell may include a first PMOS transistor and a first NMOS transistor configured to receive a programmed state selection (BLOWB) signal, a second PMOS transistor and a second NMOS transistor configured to receive a write word line bar (WWLB) for a program operation, a first read NMOS transistor and a second read NMOS transistor configured to receive a read word line (RWL) for a read operation, a program transistor configured to control a program current to flow for a fusing operation, and an eFuse connected between the first read NMOS transistor and the second read NMOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.