Method for detecting defects in semiconductor device
US11854913B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2021 |
| Grant date | Dec 26, 2023 |
| Priority date | — |
| Expiry date | Apr 9, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for detecting defects in a semiconductor device including singulating a die having a substrate including a circuit region and an outer border, a plurality of detecting devices disposed over the substrate and located between the circuit region and the outer border, a first probe pad and a second probe pad electrically connected to two ends of each detecting device, and a seal ring located between the outer border of the die and the detecting devices. The method further includes probing the first probe pad and the second probe pad to determine a connection status of the detecting device, and recognizing a defect when the connection status of the detecting device indicates an open circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.