Three-dimensional semiconductor memory device
US11854982B2 · kind B2 · utility
0Cited by
4References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 7, 2022 |
| Grant date | Dec 26, 2023 |
| Priority date | — |
| Expiry date | Nov 7, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three-dimensional semiconductor memory device may include a first stack structure block including first stack structures arranged in a first direction on a substrate, a second stack structure block including second stack structures arranged in the first direction on the substrate, a separation structure disposed on the substrate between the first and second stack structure blocks and including first mold layers and second mold layers, and a contact plug penetrating the separation structure. A bottom surface of the contact plug may contact the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.