Extensible device hosted root of trust architecture for integrated circuits
US11861010B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2022 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Jun 23, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit can include a communication endpoint configured to maintain a communication link with a host computer, a queue configured to receive a plurality of host commands from the host computer via the communication link, and a processor configured to execute a device runtime. The processor, responsive to executing the device runtime, is configured to perform validation of the host commands read from the queue and selectively execute the host commands based on a result of the validation on a per host command basis. The host commands are executable by the processor to manage functions of the integrated circuit. The queue is implemented in a region of memory that is shared by the integrated circuit and the host computer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.