System and method for performing process model calibration in a virtual semiconductor device fabrication environment
US11861289B2 · kind B2 · utility
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17Claims
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Key dates
| Filing date | Sep 16, 2021 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Sep 16, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2219/2004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A virtual fabrication environment for semiconductor device fabrication that includes an analytics module for performing key parameter identification, process model calibration and variability analysis is discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.