Non-volatile memory with plane independent screening
US11862256B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2022 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Jul 30, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile storage apparatus that comprises a plurality of planes of non-volatile memory cells is capable of concurrently programming memory cells in multiple planes. In order to screen for failure of the programming process in a subset of planes, the completion of programming of a fastest plane to a particular data state is used as a trigger to test for program failure of other planes to a different data state. In one embodiment, the test for program failure of other planes to the different data state comprises determining if the memory cells of the other planes that are targeted for programming to the different data state have successfully completed verification of programming for the different data state. The programming process is stopped for those planes that fail the test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.