Bandwidth saving architecture for scalable video coding
US11863769B2 · kind B2 · utility
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Key dates
| Filing date | Aug 16, 2021 |
| Grant date | Jan 2, 2024 |
| Priority date | — |
| Expiry date | Aug 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/80
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system configured to perform scalable video encoding is provided. The system includes a memory; and a processing unit, wherein the processing unit is configured to: receive inter-layer data and a current picture, wherein the current picture has a base layer; upsample the inter-layer data to generate residual data and reconstruction data, wherein the inter-layer data includes a base mode flag; and encode the current picture to an enhanced layer using the upsampled inter-layer data based on a block type of the base layer and the base mode flag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.