Adjustment to trim settings based on a use of a memory device
US11869611B2 · kind B2 · utility
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4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2022 |
| Grant date | Jan 9, 2024 |
| Priority date | — |
| Expiry date | Dec 2, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus can include an array of memory cells and control circuitry coupled to the array of memory cells. The control circuitry can be configured to store a number of trim settings and receive signaling indicative of a use of the array of memory cells. The control circuitry can be configured to determine an adjustment to the number of trim settings based at least in part on the signaling.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.