Hybrid pulse/two-stage data latch
US11870442B2 · kind B2 · utility
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4References
20Claims
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Key dates
| Filing date | Jul 12, 2022 |
| Grant date | Jan 9, 2024 |
| Priority date | — |
| Expiry date | Jul 12, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a control circuit configured to selectively activate, based on an operating mode signal, either a local clock signal or a pulse signal. The apparatus further includes a data storage circuit that is coupled to a data signal, the local clock signal, and the pulse signal. The data storage circuit may be configured to sample the data signal using the local clock signal during a first operating mode, and to sample the data signal using the pulse signal during a second operating mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.