Memory device
US11871556B2 · kind B2 · utility
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15Claims
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Assignee
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Key dates
| Filing date | Jan 26, 2021 |
| Grant date | Jan 9, 2024 |
| Priority date | — |
| Expiry date | Aug 23, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/47
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A memory device includes a substrate, an active layer spaced apart from a surface of the substrate and laterally oriented in a first direction and including an opened first side, a closed second side, and a channel layer between the first side and the second side, and a word line laterally oriented in a second direction crossing the first direction while surrounding the channel layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.