Method and system for manufacturing semiconductor layer
US11876001B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2021 |
| Grant date | Jan 16, 2024 |
| Priority date | — |
| Expiry date | Jul 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/687
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a method and system for manufacturing a semiconductor layer. The method includes: placing a first wafer in a cavity to form a metal film on the first wafer; before forming the metal film, the temperature inside the cavity is a first temperature; transferring the first wafer on which the metal film has been formed out of the cavity; the temperature in the cavity is a second temperature, and the second temperature is greater than the first temperature; introducing an inert gas into the cavity to cool the cavity, such that the temperature in the cavity is equal to the first temperature; after the temperature in the cavity is equal to the first temperature, placing a second wafer in the cavity to form the metal film on the second wafer. The manufacturing method can reduce the defects on the surface of the metal film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.