Non-fighting level shifters
US11876516B2 · kind B2 · utility
0Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2021 |
| Grant date | Jan 16, 2024 |
| Priority date | — |
| Expiry date | Nov 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/037
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A level shifter circuit includes a first current mirror coupled between a power terminal and a ground terminal, a second current mirror coupled between the power terminal and the ground terminal, and a level shifter. The level shifter includes a first transistor coupled to the first current mirror and a second transistor coupled to the second current mirror. The first current mirror and the second current mirror control a state of the first transistor and the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.