Semiconductor device with low-k spacer
US11877437B2 · kind B2 · utility
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2References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2021 |
| Grant date | Jan 16, 2024 |
| Priority date | — |
| Expiry date | Apr 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
Abstract
A semiconductor device includes: a semiconductor device, comprising: a bit line structure including a bit line contact plug, a bit line, and a bit line hard mask that are sequentially stacked over a substrate; a storage node contact plug that is spaced apart from the bit line structure; a conformal spacer that is positioned between the bit line and the storage node contact plug and includes a low-k material; and a seed liner that is positioned between the conformal spacer and the bit line and thinner than the conformal spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.