Stress patterning systems and methods for manufacturing free-form deformations in thin substrates
US11879170B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2020 |
| Grant date | Jan 23, 2024 |
| Priority date | — |
| Expiry date | May 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device includes a substrate and a stressed layer disposed on a first surface of the substrate. The stressed layer includes: a first set of patterns having a predetermined geometry, size, and arrangement selected to control an equibiaxial stress field of the stressed layer, wherein the equibiaxial stress field varies in magnitude over the first surface of the substrate, and a second set of patterns etched into the first set of patterns and the substrate, the second set of patterns comprising a plurality of substantially parallel lines arranged to control at least a uniaxial stress field of the stressed layer, wherein the uniaxial stress field varies in magnitude over the first surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.