Memory sub-system codeword addressing
US11886331B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 15, 2023 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Feb 15, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes writing a first codeword to a first set of contiguous partitions in a first memory die of a memory device. The method further includes writing a first portion of a second codeword to a second set of contiguous partitions in the first memory die of the memory device and writing a second portion of the second codeword to a first set of contiguous partitions in a second memory die of the memory device. The method also includes writing a third codewords to a second set of contiguous partitions in the second memory die of the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.