Semiconductor memory device managing flexible refresh skip area
US11887650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2023 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Mar 22, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4087
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device having a flexible refresh skip area includes a memory cell array including a plurality of rows to store data, a row decoder connected to the memory cell array, a refresh area storage unit to store a beginning address and an end address of a memory area that is to be refreshed in which the memory area that is to be refreshed does not include a refresh skip area having a size is selectively and/or adaptively changed, and a refresh control circuit connected to the row decoder and the refresh area storage unit. The refresh control circuit controls a refresh operation for the area that is to be refreshed and not for the refresh skip area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.