Method for forming active region array and semiconductor structure
US11887859B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2021 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Jun 1, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming an active region array and a semiconductor structure are provided. The method for forming the active region array includes the steps of: providing a substrate; forming a first mask layer on a surface of the substrate, a first etched pattern being provided in the first mask layer; forming a second mask layer covering a surface of the first mask layer; forming a third mask layer having a second etched pattern on a surface of the second mask layer; forming a flank covering a sidewall of the second etched pattern; removing the third mask layer to form a third etched pattern between adjacent flanks; etching the first mask layer along the third etched pattern to form a fourth etched pattern in the first mask layer; and etching the substrate along the first etched pattern and the fourth etched pattern, to form multiple active regions in the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.