Land-side silicon capacitor design and semiconductor package using the same
US11887976B2 · kind B2 · utility
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10Claims
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Key dates
| Filing date | Oct 6, 2021 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Apr 1, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/68
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a package substrate; a semiconductor die mounted on a top surface of the package substrate; a plurality of conductive elements disposed on a bottom surface of the package substrate; and a land-side silicon capacitor disposed on the bottom surface of the package substrate and surrounded by the plurality of conductive elements. The land-side silicon capacitor includes at least two silicon capacitor unit dies adjoined to each other with an integral scribe line region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.