Device comprising wrap-gate transistors and method of manufacturing such a device
US11889704B2 · kind B2 · utility
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7Claims
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Key dates
| Filing date | Dec 23, 2020 |
| Grant date | Jan 30, 2024 |
| Priority date | — |
| Expiry date | Dec 23, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device includes gate-all-around transistors and method for manufacturing such a device. A method for manufacturing a microelectronic device includes at least two transistors each comprising a channel in the shape of a wire extending in a first direction x, a gate surrounding said channel, a source and a drain, said transistors being stacked in a third direction z and each occupying a level nz (z=1 . . . 4) of given altitude in the third direction z.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.