Apparatus and method for improving read performance in a system
US11893269B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2022 |
| Grant date | Feb 6, 2024 |
| Priority date | — |
| Expiry date | May 7, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a memory device and a controller. The memory device includes plural storage regions including plural non-volatile memory cells. The plural storage regions have a different data input/output speed. The controller is coupled to the memory device via at least one data path. The controller performs a readahead operation in response to a read request input from an external device, determines a data attribute regarding readahead data, obtained by the readahead operation, based on a time difference between reception of the read request and completion of the readahead operation, and stores the readahead data in one of the plural storage regions based on the data attribute.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.