Magnetoresistive random access memory and method for fabricating the same
US11895926B2 · kind B2 · utility
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Key dates
| Filing date | Nov 3, 2020 |
| Grant date | Feb 6, 2024 |
| Priority date | — |
| Expiry date | May 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
Abstract
A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.