Suspension during a multi-plane write procedure
US11899963B2 · kind B2 · utility
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2References
25Claims
0Family size
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Key dates
| Filing date | Mar 11, 2022 |
| Grant date | Feb 13, 2024 |
| Priority date | — |
| Expiry date | Aug 2, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for suspension during a multi-plane write procedure are described. A memory system may perform a multi-plane write procedure by writing to a set of planes in parallel. Upon detecting a defective plane in the set of planes, the memory system may suspend writing to the defective plane until writing to the other planes in the set of planes is finished. The memory system may then resume writing to the defective plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.