Partial refresh
US11901026B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2021 |
| Grant date | Feb 13, 2024 |
| Priority date | — |
| Expiry date | Sep 6, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/3602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory chip may include: a plurality of memory banks; a data storage configured to store access information indicative of access operations for one or more segments of the plurality of memory banks; and a refresh controller configured to perform a refresh operation of the one or more segments based, at least in part, on the stored access information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.