Patent · US Active

Low-latency deserializer having fine granularity and defective-lane compensation

US11907074B2 · kind B2 · utility

0Cited by
26References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 24, 2021
Grant dateFeb 20, 2024
Priority date
Expiry dateJun 16, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/385
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments of the invention are directed to a computer-implemented method of operating a data transmission system. The data transmission system includes a transmitter and a receiver. The computer-implemented method includes using the transmitter to send serialized data from the transmitter through a plurality of lanes to the receiver. The transmitter sends the serialized data at a first serialization ratio. The receiver is configured to receive and load the serialized data at a second deserialization ratio, wherein the first serialization ration is greater than the second deserialization ratio.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.