Apparatus and methods for programming memory cells
US11908524B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2022 |
| Grant date | Feb 20, 2024 |
| Priority date | — |
| Expiry date | Oct 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus is provided that includes a memory die having a first memory cell, and a controller connected to the memory die. The controller is configured to apply a plurality of programming pulses to the first memory cell, apply a plurality of first verify pulses to the first memory cell, determine from the first verify pulses that the first memory cell has been programmed to a first programmed memory state, apply a single second verify pulse to the first memory cell after determining that the first memory cell has been programmed to the first programmed memory state, determine from the single second verify pulse that the first memory cell is no longer programmed to the first programmed memory state, and apply an additional programming pulse to the first memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.