Inventor · Shanghai, CN

Ming Wang

24Patents
5h-index
18Co-inventors
66Inventor score

Filing activity: Sep 30, 2002 → Aug 23, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US6910099B1 Disk drive adjusting read-ahead to optimize cache memory allocation Electricity 145 Expired
US6961814B1 Disk drive maintaining a cache link attribute for each of a plurality of allocation states Physics 143 Expired
US6711635B1 Disk drive employing thresholds for cache memory allocation Physics 138 Expired
US8605384B1 Disk drive performing lifetime logging of microactuator sensitivity Physics 110 Active
US11127467B1 Hybrid erase mode for high data retention in memory device Electricity 5 Active
US11309041B2 Smart erase verify test to detect slow-erasing blocks of memory cells Physics 4 Active
US11120880B1 Command sequence for hybrid erase mode for high data retention in memory device Physics 3 Active
US11335419B1 Erase technique for checking integrity of non-data word lines in memory device and corresponding firmware Physics 1 Active
US11587621B1 Foggy-fine programming for memory cells with reduced number of program pulses Electricity 0 Active
US11908524B2 Apparatus and methods for programming memory cells Electricity 0 Active
US12346562B2 Non-volatile memory bitmap for garbage collection Physics 0 Active
US11967383B2 Non-volatile memory with enhanced program operation for last state on slow plane Physics 0 Active
US12112814B2 Open block boundary group programming for non-volatile memory Physics 0 Active
US12051473B2 Non-volatile memory with precise programming Physics 0 Active
US11790994B2 Non-volatile memory with reverse state program Physics 0 Active
US11972817B2 State look ahead quick pass write algorithm to tighten ongoing natural threshold voltage of upcoming states for program time reduction Physics 0 Active
US11817157B2 Systems and methods for detecting erratic programming in a memory system Physics 0 Active
US11978507B2 Non-volatile memory with intentional overprogramming to improve short term data retention issue Physics 0 Active
US12367940B2 Simultaneous lower tail verify with upper tail verify Physics 0 Active
US11568954B2 Technique to proactively identify potential uncorrectable error correction memory cells and countermeasure in field Electricity 0 Active
US11309031B2 Periodic reduced word line bias which increases channel boosting Electricity 0 Active
US12307104B2 Non-volatile memory with secure erase Physics 0 Active
US12283324B2 Array dependent voltage compensation in a memory device Electricity 0 Active
US11557346B2 Self-adaptive program pulse width for programming 3D NAND memory Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.