Electronic device
US11916059B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2021 |
| Grant date | Feb 27, 2024 |
| Priority date | — |
| Expiry date | May 17, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An ESD protection device may include: a first vertically integrated ESD protection structure comprising a first semiconductor portion, a first contact region disposed on a first side of the first semiconductor portion and a first terminal exposed on a second side of the first semiconductor portion opposite the first side of the first semiconductor portion, a second vertically integrated ESD protection structure comprising a second semiconductor portion, a second contact region disposed on a first side of the second semiconductor portion and a second terminal exposed on a second side of the second semiconductor portion opposite the first side of the second semiconductor portion, an electrical connection layer, wherein the first vertically integrated ESD protection structure and the second vertically integrated ESD protection structure are disposed on the electrical connection layer laterally separated from each other and are electrically connected with each other anti-serially via the electrical connection layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.