Transistor with self-aligned gate and self-aligned source/drain terminal(s) and methods

US11916119B2 · kind B2 · utility

Assignee

• GLOBALFOUNDRIES U.S. Inc. · US

Inventors

• Zhong-Xiang He · South Burlington, US
• Jeonghyun Hwang · Ithaca, US
• Ramsey Hazbun · Colchester, US
• Brett T. Cucci · Colchester, US
• Ajay Raman · South Burlington, US
• Johnatan A. Kantarovsky · South Burlington, US

Key dates

• Filing date: Nov 3, 2021
• Grant date: Feb 27, 2024
• Expiry date: Jun 8, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/411

Abstract

Disclosed are embodiments of a transistor (e.g., a III-V high electron mobility transistor (HEMT), a III-V metal-insulator-semiconductor HEMT (MISHEMT), or the like) that has multiple self-aligned terminals. The self-aligned terminals include a self-aligned gate, a self-aligned source terminal and, optionally, a self-aligned drain terminal. By forming self-aligned terminals during processing, the separation distances between the terminals (e.g., between the gate and source terminal and, optionally, between the gate and drain terminal) can be reduced in order to reduce device size and to improve performance (e.g., to reduce on resistance and increase switching speeds). Also disclosed herein are method embodiments for forming such a transistor.